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◆ ABORT_TX
◆ BTLMODE
◆ CLKOUT_DISABLE
#define CLKOUT_DISABLE 0x00 |
◆ CLKOUT_ENABLE
#define CLKOUT_ENABLE 0x04 |
◆ CLKOUT_PS1
◆ CLKOUT_PS2
◆ CLKOUT_PS4
◆ CLKOUT_PS8
◆ MCP_BITMOD
◆ MCP_CANCTRL
◆ MCP_CANINTE
◆ MCP_CANINTF
◆ MCP_CANSTAT
◆ MCP_CNF1
◆ MCP_CNF2
◆ MCP_CNF3
◆ MCP_EFLG
◆ MCP_ERRIF
◆ MCP_LOAD_TX0
#define MCP_LOAD_TX0 0x40 |
◆ MCP_LOAD_TX1
#define MCP_LOAD_TX1 0x42 |
◆ MCP_LOAD_TX2
#define MCP_LOAD_TX2 0x44 |
◆ MCP_MERRF
◆ MCP_NO_INT
◆ MCP_READ
◆ MCP_READ_RX0
#define MCP_READ_RX0 0x90 |
◆ MCP_READ_RX1
#define MCP_READ_RX1 0x94 |
◆ MCP_READ_STATUS
#define MCP_READ_STATUS 0xA0 |
◆ MCP_REC
◆ MCP_RESET
◆ MCP_RTS_ALL
◆ MCP_RTS_TX0
◆ MCP_RTS_TX1
◆ MCP_RTS_TX2
◆ MCP_RX0IF
◆ MCP_RX1IF
◆ MCP_RX_INT
◆ MCP_RX_STATUS
#define MCP_RX_STATUS 0xB0 |
◆ MCP_RXB0CTRL
#define MCP_RXB0CTRL 0x60 |
◆ MCP_RXB0D0
◆ MCP_RXB0SIDH
#define MCP_RXB0SIDH 0x61 |
◆ MCP_RXB0SIDL
#define MCP_RXB0SIDL 0x62 |
◆ MCP_RXB1CTRL
#define MCP_RXB1CTRL 0x70 |
◆ MCP_RXB1SIDH
#define MCP_RXB1SIDH 0x71 |
◆ MCP_RXF0EID0
#define MCP_RXF0EID0 0x03 |
◆ MCP_RXF0EID8
#define MCP_RXF0EID8 0x02 |
◆ MCP_RXF0SIDH
#define MCP_RXF0SIDH 0x00 |
◆ MCP_RXF0SIDL
#define MCP_RXF0SIDL 0x01 |
◆ MCP_RXF1EID0
#define MCP_RXF1EID0 0x07 |
◆ MCP_RXF1EID8
#define MCP_RXF1EID8 0x06 |
◆ MCP_RXF1SIDH
#define MCP_RXF1SIDH 0x04 |
◆ MCP_RXF1SIDL
#define MCP_RXF1SIDL 0x05 |
◆ MCP_RXF2EID0
#define MCP_RXF2EID0 0x0B |
◆ MCP_RXF2EID8
#define MCP_RXF2EID8 0x0A |
◆ MCP_RXF2SIDH
#define MCP_RXF2SIDH 0x08 |
◆ MCP_RXF2SIDL
#define MCP_RXF2SIDL 0x09 |
◆ MCP_RXF3EID0
#define MCP_RXF3EID0 0x13 |
◆ MCP_RXF3EID8
#define MCP_RXF3EID8 0x12 |
◆ MCP_RXF3SIDH
#define MCP_RXF3SIDH 0x10 |
◆ MCP_RXF3SIDL
#define MCP_RXF3SIDL 0x11 |
◆ MCP_RXF4EID0
#define MCP_RXF4EID0 0x17 |
◆ MCP_RXF4EID8
#define MCP_RXF4EID8 0x16 |
◆ MCP_RXF4SIDH
#define MCP_RXF4SIDH 0x14 |
◆ MCP_RXF4SIDL
#define MCP_RXF4SIDL 0x15 |
◆ MCP_RXF5EID0
#define MCP_RXF5EID0 0x1B |
◆ MCP_RXF5EID8
#define MCP_RXF5EID8 0x1A |
◆ MCP_RXF5SIDH
#define MCP_RXF5SIDH 0x18 |
◆ MCP_RXF5SIDL
#define MCP_RXF5SIDL 0x19 |
◆ MCP_RXM0EID0
#define MCP_RXM0EID0 0x23 |
◆ MCP_RXM0EID8
#define MCP_RXM0EID8 0x22 |
◆ MCP_RXM0SIDH
#define MCP_RXM0SIDH 0x20 |
◆ MCP_RXM0SIDL
#define MCP_RXM0SIDL 0x21 |
◆ MCP_RXM1EID0
#define MCP_RXM1EID0 0x27 |
◆ MCP_RXM1EID8
#define MCP_RXM1EID8 0x26 |
◆ MCP_RXM1SIDH
#define MCP_RXM1SIDH 0x24 |
◆ MCP_RXM1SIDL
#define MCP_RXM1SIDL 0x25 |
◆ MCP_TEC
◆ MCP_TX01_INT
#define MCP_TX01_INT 0x0C |
◆ MCP_TX01_MASK
#define MCP_TX01_MASK 0x14 |
◆ MCP_TX0IF
◆ MCP_TX1IF
◆ MCP_TX2IF
◆ MCP_TX_INT
◆ MCP_TX_MASK
◆ MCP_TXB0CTRL
#define MCP_TXB0CTRL 0x30 |
◆ MCP_TXB0D0
◆ MCP_TXB0D1
◆ MCP_TXB0DLC
◆ MCP_TXB0SIDH
#define MCP_TXB0SIDH 0x31 |
◆ MCP_TXB0SIDL
#define MCP_TXB0SIDL 0x32 |
◆ MCP_TXB1CTRL
#define MCP_TXB1CTRL 0x40 |
◆ MCP_TXB2CTRL
#define MCP_TXB2CTRL 0x50 |
◆ MCP_TXREQ
◆ MCP_WAKIF
◆ MCP_WRITE
◆ MODE_CONFIG
◆ MODE_LISTENONLY
#define MODE_LISTENONLY 0x60 |
◆ MODE_LOOPBACK
#define MODE_LOOPBACK 0x40 |
◆ MODE_MASK
◆ MODE_NORMAL
◆ MODE_ONESHOT
#define MODE_ONESHOT 0x08 |
◆ MODE_POWERUP
#define MODE_POWERUP 0xE0 |
◆ MODE_SLEEP
◆ SAMPLE_1X
◆ SAMPLE_3X
◆ SJW1
◆ SJW2
◆ SJW3
◆ SJW4
◆ SOF_DISABLE
◆ SOF_ENABLE
◆ WAKFIL_DISABLE
#define WAKFIL_DISABLE 0x00 |
◆ WAKFIL_ENABLE
#define WAKFIL_ENABLE 0x40 |