TTK4155 Ping-pong project
MCP2515.h
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1 #ifndef __MCP2515_H
2 #define __MCP2515_H
3 
4 /*
5 mcp2515.h
6 
7 This file contains constants that are specific to the MCP2515.
8 
9 Version Date Description
10 ----------------------------------------------------------------------
11 v1.00 2003/12/11 Initial release
12 
13 Copyright 2003 Kimberly Otten Software Consulting
14 */
15 
16 // Define MCP2515 register addresses
17 
18 #define MCP_RXF0SIDH 0x00
19 #define MCP_RXF0SIDL 0x01
20 #define MCP_RXF0EID8 0x02
21 #define MCP_RXF0EID0 0x03
22 #define MCP_RXF1SIDH 0x04
23 #define MCP_RXF1SIDL 0x05
24 #define MCP_RXF1EID8 0x06
25 #define MCP_RXF1EID0 0x07
26 #define MCP_RXF2SIDH 0x08
27 #define MCP_RXF2SIDL 0x09
28 #define MCP_RXF2EID8 0x0A
29 #define MCP_RXF2EID0 0x0B
30 #define MCP_CANSTAT 0x0E
31 #define MCP_CANCTRL 0x0F
32 #define MCP_RXF3SIDH 0x10
33 #define MCP_RXF3SIDL 0x11
34 #define MCP_RXF3EID8 0x12
35 #define MCP_RXF3EID0 0x13
36 #define MCP_RXF4SIDH 0x14
37 #define MCP_RXF4SIDL 0x15
38 #define MCP_RXF4EID8 0x16
39 #define MCP_RXF4EID0 0x17
40 #define MCP_RXF5SIDH 0x18
41 #define MCP_RXF5SIDL 0x19
42 #define MCP_RXF5EID8 0x1A
43 #define MCP_RXF5EID0 0x1B
44 #define MCP_TEC 0x1C
45 #define MCP_REC 0x1D
46 #define MCP_TXREQ 3
47 #define MCP_RXM0SIDH 0x20
48 #define MCP_RXM0SIDL 0x21
49 #define MCP_RXM0EID8 0x22
50 #define MCP_RXM0EID0 0x23
51 #define MCP_RXM1SIDH 0x24
52 #define MCP_RXM1SIDL 0x25
53 #define MCP_RXM1EID8 0x26
54 #define MCP_RXM1EID0 0x27
55 #define MCP_CNF3 0x28
56 #define MCP_CNF2 0x29
57 #define MCP_CNF1 0x2A
58 #define MCP_CANINTE 0x2B
59 #define MCP_CANINTF 0x2C
60 #define MCP_EFLG 0x2D
61 #define MCP_TXB0CTRL 0x30
62 #define MCP_TXB0SIDH 0x31
63 #define MCP_TXB0SIDL 0x32
64 #define MCP_TXB0DLC 0x35
65 #define MCP_TXB0D0 0x36
66 #define MCP_TXB0D1 0x37
67 #define MCP_TXB1CTRL 0x40
68 #define MCP_TXB2CTRL 0x50
69 #define MCP_RXB0CTRL 0x60
70 #define MCP_RXB0SIDH 0x61
71 #define MCP_RXB0SIDL 0x62
72 #define MCP_RXB0D0 0x66
73 #define MCP_RXB1CTRL 0x70
74 #define MCP_RXB1SIDH 0x71
75 
76 #define MCP_TX_INT 0x1C // Enable all transmit interrupts
77 #define MCP_TX01_INT 0x0C // Enable TXB0 and TXB1 interrupts
78 #define MCP_RX_INT 0x03 // Enable receive interrupts
79 #define MCP_NO_INT 0x00 // Disable all interrupts
80 
81 #define MCP_TX01_MASK 0x14
82 #define MCP_TX_MASK 0x54
83 
84 // Define SPI Instruction Set
85 
86 #define MCP_WRITE 0x02
87 
88 #define MCP_READ 0x03
89 
90 #define MCP_BITMOD 0x05
91 
92 #define MCP_LOAD_TX0 0x40
93 #define MCP_LOAD_TX1 0x42
94 #define MCP_LOAD_TX2 0x44
95 
96 #define MCP_RTS_TX0 0x81
97 #define MCP_RTS_TX1 0x82
98 #define MCP_RTS_TX2 0x84
99 #define MCP_RTS_ALL 0x87
100 
101 #define MCP_READ_RX0 0x90
102 #define MCP_READ_RX1 0x94
103 
104 #define MCP_READ_STATUS 0xA0
105 
106 #define MCP_RX_STATUS 0xB0
107 
108 #define MCP_RESET 0xC0
109 
110 
111 // CANCTRL Register Values
112 
113 #define MODE_NORMAL 0x00
114 #define MODE_SLEEP 0x20
115 #define MODE_LOOPBACK 0x40
116 #define MODE_LISTENONLY 0x60
117 #define MODE_CONFIG 0x80
118 #define MODE_POWERUP 0xE0
119 #define MODE_MASK 0xE0
120 #define ABORT_TX 0x10
121 #define MODE_ONESHOT 0x08
122 #define CLKOUT_ENABLE 0x04
123 #define CLKOUT_DISABLE 0x00
124 #define CLKOUT_PS1 0x00
125 #define CLKOUT_PS2 0x01
126 #define CLKOUT_PS4 0x02
127 #define CLKOUT_PS8 0x03
128 
129 
130 // CNF1 Register Values
131 
132 #define SJW1 0x00
133 #define SJW2 0x40
134 #define SJW3 0x80
135 #define SJW4 0xC0
136 
137 
138 // CNF2 Register Values
139 
140 #define BTLMODE 0x80
141 #define SAMPLE_1X 0x00
142 #define SAMPLE_3X 0x40
143 
144 
145 // CNF3 Register Values
146 
147 #define SOF_ENABLE 0x80
148 #define SOF_DISABLE 0x00
149 #define WAKFIL_ENABLE 0x40
150 #define WAKFIL_DISABLE 0x00
151 
152 
153 // CANINTF Register Bits
154 
155 #define MCP_RX0IF 0x01
156 #define MCP_RX1IF 0x02
157 #define MCP_TX0IF 0x04
158 #define MCP_TX1IF 0x08
159 #define MCP_TX2IF 0x10
160 #define MCP_ERRIF 0x20
161 #define MCP_WAKIF 0x40
162 #define MCP_MERRF 0x80
163 
164 
165 
166 #endif